Patent · US Active

Virtualization logic

US7600082B2 · kind B2 · utility

6Cited by
5References
23Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 30, 2004
Grant dateOct 6, 2009
Priority date
Expiry dateOct 5, 2026

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/45537
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Systems, methodologies, media, and other embodiments associated with externally trapping transactions are described. One exemplary system embodiment includes an external virtualization logic configured to be operably connected to a processor that does not include internal virtualization support. The example system may include a data store for storing a trappable memory address and a transaction that causes the external virtualization logic to produce a trap.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.