Patent · US Expired

Semiconductor array and method for manufacturing a semiconductor array

US7601584B2 · kind B2 · utility

0Cited by
10References
17Claims
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Inventor

Key dates

Filing dateNov 4, 2005
Grant dateOct 13, 2009
Priority date
Expiry dateNov 4, 2025

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D62/177

Abstract

A method for manufacturing a semiconductor array, particularly a high-frequency bipolar transistor, is provided, the method includes process steps, so that a dielectric is produced on a mono-crystalline, first semiconductor region of a first conductivity type, a silicide layer is deposited and patterned in such a way that the silicide layer is insulated from the first semiconductor region by the dielectric, and, to form a base region, a second semiconductor region of a second conductivity type is applied to the first semiconductor region and to the silicide layer in such a way that the second semiconductor region lies with a first interface on the first semiconductor region and with a second interface on the silicide layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.