Method for manufacturing semiconductor device having solder layer
US7601625B2 · kind B2 · utility
5Cited by
3References
12Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Apr 19, 2005 |
| Grant date | Oct 13, 2009 |
| Priority date | — |
| Expiry date | Jan 28, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19043
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a semiconductor device having a solder layer includes the steps of: grinding a mounting surface of a semiconductor chip; etching the mounting surface of the chip; forming an electrode on the mounting surface of the chip; assembling the chip, the solder layer and a base in this order; and heating the chip, the solder layer and the base to be equal to or higher than a solidus temperature of the solder layer so that the solder layer is reflowed for soldering the chip on the base.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.