Network security protocol processor and method thereof
US7603549B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 11, 2003 |
| Grant date | Oct 13, 2009 |
| Priority date | — |
| Expiry date | Oct 7, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L63/102
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A cryptographic processor having an in-line (i.e., “bump-in-the-wire”) architecture processes data packets between a trusted domain and a untrusted domain, according to a predetermined security protocol. The cryptographic processor can be implemented as a stand-alone device, without requiring a change in the configuration of the host machine. Unlike a conventional hardware acceleration of a “bump-in-the-stack” implementation, which is typically implemented as a layer between the native IP layer and the network drivers in an IP protocol stack and uses a single bus interface (e.g., a PCI-X bus) for all data traffic, the cryptographic processor acts as a security gateway, providing separate interfaces for the trusted and the untrusted domains. The cryptographic processor includes pipeline stages for carrying a feedback encryption algorithm with optimal throughput.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.