Method of fabricating a bipolar transistor
US7605027B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 24, 2006 |
| Grant date | Oct 20, 2009 |
| Priority date | — |
| Expiry date | May 30, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/137
Abstract
A method of fabricating a bipolar transistor in a first trench (11) is disclosed wherein only one photolithographic mask is applied which forms a first trench (11) and a second trench (12). A collector region (21) is formed self-aligned in the first trench (11) and the second trench (12). A base region (31) is formed self-aligned on a portion of the collector region (21), which is in the first trench (11). An emitter region (41) is formed self-aligned on a portion of the base region (31). A contact to the collector region (21) is formed in the second trench (12) and a contact to the base region (31) is formed in the first trench (11). The fabrication of the bipolar transistor may be integrated in a standard CMOS process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.