Semiconductor device
US7605422B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2007 |
| Grant date | Oct 20, 2009 |
| Priority date | — |
| Expiry date | Dec 19, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/62
Abstract
A semiconductor device capable of realizing low-voltage drivability and large storage capacity (miniaturization) by achieving large threshold voltage shifts and long retention time while at the same time suppressing variations in characteristics among memory cells is disclosed. The device includes a semiconductor memory cell having a channel region formed in a semiconductor substrate, a tunnel insulator film on the channel region, a charge storage insulator film on the tunnel insulator film, a control dielectric film on the charge storage film, a control electrode on the control dielectric film, and source/drain regions at opposite ends of the channel region. The memory cell's channel region has a cross-section at right angles to a direction along the channel length, the width W and height H of which are each less than or equal to 10 nm.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.