Semiconductor package and method of manufacturing the same
US7605478B2 · kind B2 · utility
0Cited by
2References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2007 |
| Grant date | Oct 20, 2009 |
| Priority date | — |
| Expiry date | Dec 20, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/01079
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided are a semiconductor package and a method of manufacturing the semiconductor package, and more particularly, a semiconductor package with bonding wires and a method of manufacturing the semiconductor package. The semiconductor package includes a substrate including a finger, at least one semiconductor chip stacked on the substrate, the semiconductor chip including a chip pad, and a wire which electrically connects the finger with the chip pad, wherein one end of the wire bonds with an upper surface and lateral surfaces of the finger.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.