Apparatus and method for controlling die force in a semiconductor device testing assembly
US7605581B2 · kind B2 · utility
2Cited by
30References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2006 |
| Grant date | Oct 20, 2009 |
| Priority date | — |
| Expiry date | Jun 16, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2891
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A semiconductor device test assembly includes a heat sink having a surface configured to support a device under test, an inner bellow, an outer bellow at least partially surrounding the inner bellow, and a fluid channel within the inner bellow for providing a fluid to the heat sink. The semiconductor device test assembly can further include an air adjustment unit for adjusting an air pressure in the outer bellow, so as to adjust a contact force between the heat sink and the device under test.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.