Decoding method and apparatus
US7606296B1 · kind B1 · utility
35Cited by
18References
34Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 11, 2007 |
| Grant date | Oct 20, 2009 |
| Priority date | — |
| Expiry date | Jun 11, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2025/0349
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A decoder comprises an equalizer that receives a modulated signal comprising a plurality of symbols including a first symbol defined by a first number of chips. A subsymbol processor that generates a subsymbol waveform after receiving a second number of chips of the first symbol and before at least one of receiving, decoding, and deciding the first number of chips of the first symbol. The second number is less than the first number, and wherein the equalizer equalizes the modulated signal using the subsymbol waveform.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.