Systems and methods for CPU repair
US7607038B2 · kind B2 · utility
4Cited by
32References
34Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 17, 2006 |
| Grant date | Oct 20, 2009 |
| Priority date | — |
| Expiry date | Jun 10, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0802
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a method for repairing a faulty cache element is provided. Once a monitored cache element is determined to be faulty, the system stores the repair information, and cache configuration in an EEPROM or non-volatile memory on the CPU module. Then the computer is rebooted. During the reboot, the faulty cache element is repaired by being swapped out for a spare cache element based on the information stored in the EEPROM or the non-volatile memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.