Method and control system for recognizing a fault when processing data in a processing system
US7607050B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 18, 2006 |
| Grant date | Oct 20, 2009 |
| Priority date | — |
| Expiry date | Dec 9, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1497
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention relates to a method for recognizing a fault when processing input data in a processing system to form a data packet which contains output data and a test data item, the test data item being formed in order to confirm the validity of the output data. The following method steps are executed serially: The output data ascertained on the basis of the input data in line with a first processing method. The test data item is ascertained on the basis of the input data in line with a second processing method, with intermediate output data being ascertained on the basis of the input data in line with a third processing method, and a test data item is determined from the ascertained intermediate output data in line with a fourth processing method, wherein the first processing method and the third processing method implement the same function by different routes. A fault is recognized in the processing system if the validity of the output data cannot be confirmed by the test data item.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.