Interrupt processing control
US7607133B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2004 |
| Grant date | Oct 20, 2009 |
| Priority date | — |
| Expiry date | Aug 17, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4818
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system 2 supporting interrupt handling is provided with an interrupt controller 24. The interrupt controller is responsive to save state data when interrupt processing is commenced by pre-emption of existing processing, whether that be background processing or another interrupt. If a further interrupt is required to be executed immediately after the interrupt which triggered the pre-emption, then the speed with which interrupt processing can be started is advantageously increased if that subsequent interrupt processing is performed without restoring and then resaving the original state data. The interrupts in this arrangement can be considered to be chained together without intervening save and restore operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.