Electronic device
US7608476B2 · kind B2 · utility
2Cited by
16References
33Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 16, 2005 |
| Grant date | Oct 27, 2009 |
| Priority date | — |
| Expiry date | May 16, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K85/113
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A technique for high-resolution surface energy assisted patterning of semiconductor active layer islands on top of an array of predefined source-drain electrodes without requiring an additional process step for surface energy patterning.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.