Vertical IMOS transistor having a PIN diode formed within
US7608867B2 · kind B2 · utility
8Cited by
3References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2006 |
| Grant date | Oct 27, 2009 |
| Priority date | — |
| Expiry date | Apr 6, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D12/211
Abstract
A vertical IMOS-type transistor including: a stack of a first semiconductor portion doped with dopant elements of a first type, of a second substantially undoped intrinsic semiconductor portion, and of a third semiconductor portion doped with dopant elements of a second type forming a PIN-type diode; and a conductive gate placed against the stack with an interposed insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.