Disabling faulty flash memory dies
US7609561B2 · kind B2 · utility
50Cited by
35References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 18, 2006 |
| Grant date | Oct 27, 2009 |
| Priority date | — |
| Expiry date | Oct 26, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Articles and associated methods and systems relate to disabling defective flash memory dies in a device containing multiple flash memory dies. Packages containing multiple flash memory dies may be labeled to indicate a flash memory data storage capacity based on the flash memory dies that are not disabled. Various disabling methods may be applied at the die level, package level, and/or board level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.