Negative acknowledgment (NAK) suppression
US7609639B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 7, 2002 |
| Grant date | Oct 27, 2009 |
| Priority date | — |
| Expiry date | Aug 1, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/1848
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Logic circuitry (409) constantly monitors a transmitter (410) to determine if the transmitter (410) is idle. Logic circuitry (409) suppresses all NAKs until data and other channel information is not being transmitted by the transmitter (410) and RF resources are not scarce. Additionally, logic circuitry (409) suppresses all NAKs until a predetermined number of NAKs has been buffered by the logic circuitry (409). More particularly, logic circuitry (409) determines when a number of NAKs will sufficiently fill an over-the-air frame. Once the predetermined number of NAKs has been collected, the logic circuitry (409) will generate the appropriate NAKs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.