Optimizing switching element for minimal latency
US7609695B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 23, 2002 |
| Grant date | Oct 27, 2009 |
| Priority date | — |
| Expiry date | Sep 4, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L45/00
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
New coding scheme to minimize the total local delay in the switching elements. Under the new coding scheme, the switching element can be optimized such that it can start to produce the first output bits of the output packets without having to wait for the complete arrival of all of the local routing bits, and hence reduces the local buffering delay. In practical switching applications, each switching element in a multistage switching network supporting multicasting is a bicast cell, and the concomitant new coding scheme can even achieve a minimum delay in each bicast cell. Hence the total latency of the overall switching network is minimized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.