Multi-dimensional computation distribution in a packet processing device having multiple processing architecture
US7610330B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2006 |
| Grant date | Oct 27, 2009 |
| Priority date | — |
| Expiry date | Apr 28, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L45/38
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Flow-aware task distribution in network devices having multiple processor architectures. In one embodiment, the present invention can be used for high bandwidth network processing in an application and flow aware Quality of Service (QoS) network device. In some implementations, the present invention provides a task distribution architecture capable of flow state awareness and link level QoS control. In some implementations, the present invention can incorporate one or more processes, such as flow distributors and device distributors, that route packets for processing among different processing units on the basis flow correspondence and/or link or network path attributes. The flow and device distributors, in one implementation, allow for the separation and paralletization of packet processing functionality into flow-specific and link-specific processing units, allowing for a highly-scalable, flow-aware task distribution in a network device that processes network application traffic.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.