Patent · US Active

System for providing open-loop quadrature clock generation

US7612621B2 · kind B2 · utility

22Cited by
5References
12Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 16, 2007
Grant dateNov 3, 2009
Priority date
Expiry dateOct 16, 2027

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K2005/00234
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A system for providing open-loop quadrature clock generation. The system is implemented by a ring oscillator structure that includes input inverters for receiving an input clock, forward direction loop inverters, backward direction loop inverters, one or more outputs, and cross-coupled latches connected between any two opposite nodes.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.