Memory control method of graphic processor unit
US7612781B2 · kind B2 · utility
2Cited by
19References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 20, 2005 |
| Grant date | Nov 3, 2009 |
| Priority date | — |
| Expiry date | Jun 2, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0223
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A graphic memory is space-divided into a first area and a second area. In the first area, a task corresponding to a predetermined application is executed regardless of which task is processed by a main processor. A switchable area is divided in time so that data related to tasks corresponding to a plurality of applications is sequentially stored in the switchable area in accordance with task switching in the main processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.