Transceiver module and integrated circuit with dual eye openers and integrated loopback and bit error rate testing
US7613393B2 · kind B2 · utility
17Cited by
105References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 28, 2003 |
| Grant date | Nov 3, 2009 |
| Priority date | — |
| Expiry date | Jan 13, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/033
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A transceiver module having integrated eye diagram opening functionality for reducing jitter is described. The transceiver module may include a transmitter eye opener and a receiver eye opener integrated in single circuit. The transceiver module may also include serial control and various other integrated components. Other functionalities that may be integrated on the transceiver module include loopback modules, bypass features, bit error rate testing, and power down modes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.