Floating point remainder with embedded status information
US7613762B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 28, 2001 |
| Grant date | Nov 3, 2009 |
| Priority date | — |
| Expiry date | Sep 1, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/499
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system for providing a floating point remainder comprises an analyzer circuit configured to determine a first status of a first floating point operand and a second status of a second floating point operand based upon data within the first floating point operand and the second floating point operand, respectively. In addition, the system comprises a results circuit coupled to the analyzer circuit. The results circuit is configured to assert a resulting floating point operand containing the remainder of the first floating point operand and the second floating point operand and a resulting status embedded within the resulting floating point operand.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.