Power mode transition in multi-threshold complementary metal oxide semiconductor (MTCMOS) circuits
US7613942B2 · kind B2 · utility
3Cited by
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18Claims
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Key dates
| Filing date | May 31, 2006 |
| Grant date | Nov 3, 2009 |
| Priority date | — |
| Expiry date | Oct 21, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/3203
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a method for power mode transition in a multi-threshold complementary metal oxide semiconductor (MTCMOS) circuit includes clustering logic cells in the circuit to a number of logic clusters and optimizing wake-up times of the logic clusters to reduce a total turn-on time of the circuit while keeping below a predetermined threshold a sum of currents flowing from the circuit to ground, a sum of currents flowing from a supply voltage to the circuit, or both during a transition by the circuit from sleep mode to active mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.