Structure for implementation of back-illuminated CMOS or CCD imagers

US7615808B2 · kind B2 · utility

Assignee

• CALIFORNIA INSTITUTE OF TECHNOLOGY · US

Inventors

• Bedabrata Pain · Los Angeles, US
• Thomas J. Cunningham · Pasadena, US

Key dates

• Filing date: Sep 13, 2005
• Grant date: Nov 10, 2009
• Expiry date: Jun 8, 2026

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10F77/40

Abstract

A structure for implementation of back-illuminated CMOS or CCD imagers. An epitaxial silicon layer is connected with a passivation layer, acting as a junction anode. The epitaxial silicon layer converts light passing through the passivation layer and collected by the imaging structure to photoelectrons. A semiconductor well is also provided, located opposite the passivation layer with respect to the epitaxial silicon layer, acting as a junction cathode. Prior to detection, light does not pass through a dielectric separating interconnection metal layers.