Gate driver topology for maximum load efficiency
US7615940B2 · kind B2 · utility
5Cited by
8References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2006 |
| Grant date | Nov 10, 2009 |
| Priority date | — |
| Expiry date | Oct 2, 2026 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit comprises a first input for receiving a supply voltage and a second input for receiving a sensed current signal from an output of a DC to DC converter. The circuit also includes an output voltage for providing an adjustable drive voltage to a drive circuit. The circuit additionally includes circuitry for adjusting the drive voltage responsive to supply voltage and the sensed current signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.