Method and system for slicing a communication signal
US7616700B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2004 |
| Grant date | Nov 10, 2009 |
| Priority date | — |
| Expiry date | May 2, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/03312
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A slicer can receive a communication signal having a level or amplitude that is between two discrete levels of a multilevel digital communication scheme. The slicer can compare the communication signal to a plurality of references such that multiple comparisons proceed essentially in parallel. A summation node can add the results of the comparisons to provide an output signal set to one of the discrete levels. The slicer can process the communication signal and provide the output signal on a symbol-by-symbol basis. A decision feedback equalizer (“DFE”) can comprise the slicer. A feedback circuit of the DFE can delay and scale the output signal and apply the delayed and scaled signal to the communication signal to reduce intersymbol interference (“ISI”).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.