Method and apparatus for accessing a memory
US7617376B2 · kind B2 · utility
90Cited by
31References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 14, 2003 |
| Grant date | Nov 10, 2009 |
| Priority date | — |
| Expiry date | Nov 13, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L67/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The disclosed embodiments relate to an optimized memory registration mechanism that may comprise an upper layer protocol that associates I/O buffers with memory regions and that manages steering tags. The memory regions may be associated with a translation page table. The upper layer protocol may allocate one of the steering tags associated with at least one of the memory regions for a memory operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.