Circular register arrays of a computer
US7617383B2 · kind B2 · utility
2Cited by
75References
65Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 11, 2006 |
| Grant date | Nov 10, 2009 |
| Priority date | — |
| Expiry date | Apr 5, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30134
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A stack processor comprises a data stack with a T register, an S register, and eight hardwired bottom registers which function in a circular repeating pattern. The stack processor also comprises a return stack containing an R register, and eight hardwired bottom registers which function in a circular repeating pattern. The circular register arrays described herein eliminate overflow and underflow stack conditions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.