MOS transistor with self-aligned source and drain, and method for making the same
US7619248B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 18, 2005 |
| Grant date | Nov 17, 2009 |
| Priority date | — |
| Expiry date | Mar 18, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/40
Abstract
A MOS transistor with self-aligned source/drain terminals, and methods for its manufacture. The transistor generally includes an electrically functional substrate, a dielectric film on portions of the substrate, a gate on the dielectric film, and polycrystalline source and drain terminals self-aligned with the gate. The method generally includes forming an amorphous semiconductor material on a gate and on exposed portions of an electrically functional substrate, irradiating an upper surface of the amorphous semiconductor material to form self-aligned polycrystalline semiconducting source/drain terminal layers, and (optionally) selectively removing the non-irradiated amorphous semiconductor material portions. The present invention advantageously provides MOS thin film transistors having reliable electrical characteristics quickly, efficiently, and/or at a low cost by eliminating one or more conventional photolithographic steps.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.