Organic transistor using self-assembled monolayer
US7622734B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 2, 2007 |
| Grant date | Nov 24, 2009 |
| Priority date | — |
| Expiry date | Jan 10, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K10/466
Abstract
Disclosed are a method for inexpensively reducing the contact resistance between an electrode and an organic semiconductor upon a p-type operation of the organic semiconductor; and a method for inexpensively operating, as an n-type semiconductor, an organic semiconductor that is likely to work as a p-type semiconductor. In addition, also disclosed are a p-cannel FET, an n-channel FET, and a C-TFT which can be fabricated inexpensively. Specifically, a p-type region and an n-type region is inexpensively prepared on one substrate by arranging an organic semiconductor that is likely to work as a p-type semiconductor in a p-channel FET region and an n-channel FET region of a C-TFT; and arranging a self-assembled monolayer between an electrode and the organic semiconductor in the n-channel FET region, which self-assembled monolayer is capable of allowing the organic semiconductor to work as an n-type semiconductor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.