Metastability error reduction in signal converter systems
US7623051B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2008 |
| Grant date | Nov 24, 2009 |
| Priority date | — |
| Expiry date | Jun 24, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/164
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Signal converter systems are provided which reduce degradation of system bit error rate that is caused by metastable conversion errors which generally occur when analog input signals are near reference thresholds Vth of system comparators. When operating correctly, the comparators generate a corresponding converter code when the input signals cross the threshold. Metastability, however, may cause the comparators to fail to generate the corresponding converter code. In system embodiments, logic is provided to sense the absence of comparator decisions at the end of a predetermined decision period. In response to this absence, the system is configured to substitute the corresponding converter code. In another embodiment, the system is configured to substitute the corresponding converter code when it lies outside a predetermined digital code window.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.