System and method for providing synchronous dynamic random access memory (SDRAM) mode register shadowing in a memory system
US7624225B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2007 |
| Grant date | Nov 24, 2009 |
| Priority date | — |
| Expiry date | May 12, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1003
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for providing SDRAM mode register shadowing in a memory system. A system includes a memory interface device adapted for use in a memory system. The memory interface device includes an interface to one or more ranks of memory devices, and each memory device includes one or more types of mode registers. The memory interface device also includes an interface to a memory bus for receiving commands from a memory controller. The commands include a mode register set command specifying a new mode register setting for one or more ranks of memory devices and a mode register type. The memory interface device further includes a mode register shadow module to capture settings applied to the mode registers. The module includes a shadow register for each type of mode register and a shadow log for each type of mode register. The module also includes mode register shadow logic to detect a mode register set command, to store the new mode register setting in the shadow register corresponding to the specified mode register type, and to set one or more bits in the shadow log corresponding to the specified mode register type to indicate which of the ranks of memory devices have been …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.