Method and system of control flow graph construction
US7624382B2 · kind B2 · utility
3Cited by
14References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 26, 2005 |
| Grant date | Nov 24, 2009 |
| Priority date | — |
| Expiry date | Jul 7, 2026 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system to build a control flow graph by execution of micro-sequences using hardware. Some illustrative embodiments are a processor comprising fetch logic that retrieves an instruction from a memory, the instruction being part of a program, and decode logic coupled to the fetch logic which decodes the instruction, wherein the instruction decoded by the decode logic triggers execution of a micro-sequence to enter the instruction in a control flow graph.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.