Systems and methods for analog to digital conversion
US7626531B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 1, 2008 |
| Grant date | Dec 1, 2009 |
| Priority date | — |
| Expiry date | Feb 1, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/365
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Various different approaches are provided for conversion of analog signals to digital signals. For example, various partially clocked, multi-step analog to digital converters are discussed. Such analog to digital converters include a clocked fine conversion stage, a clocked coarse conversion stage, and a clock circuit. The fine conversion stage includes a first group of comparators clocked by a first clock and a second group of comparators clocked by a second clock. The first group of comparators is operable to compare an input voltage with a first fine reference voltage range, and the second group of comparators is operable to compare the input voltage with a second fine reference voltage range. The coarse conversion stage includes a group of clocked comparators that are operable to compare the input voltage with a coarse reference voltage range. The clock circuit selectably asserts one of the first clock and the second clock based at least in part on an output of the second conversion stage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.