Thread manager to control an array of processing elements
US7627736B2 · kind B2 · utility
6Cited by
59References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 18, 2007 |
| Grant date | Dec 1, 2009 |
| Priority date | — |
| Expiry date | May 20, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T1/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing apparatus includes a plurality of processing elements arranged in a single instruction multiple data array. The apparatus is operable to process multiple instructions streams in parallel with one another.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.