Two bit/four bit SONOS flash memory cell
US7629640B2 · kind B2 · utility
16Cited by
4References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 2, 2005 |
| Grant date | Dec 8, 2009 |
| Priority date | — |
| Expiry date | May 2, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/954
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Charge migration in a SONOS memory cell is eliminated by physically separating nitride layer storage sites with dielectric material. Increased storage in a cell is realized with a double gate structure for controlling bit storage in line channels between a source and a drain, such as with a FinFET structure in which the gates are folded over the channels on sides of a fin.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.