Semiconductor integrated circuit having connection pads over active elements
US7629689B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 11, 2005 |
| Grant date | Dec 8, 2009 |
| Priority date | — |
| Expiry date | Dec 1, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19043
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit having connection pads arranged over active elements is disclosed. The connection pad is divided into a probing area and a bonding area, and reinforcing structures are formed separately under the respective areas. The reinforcing structure under the probing area is formed using a number of wiring layers less than the number of wiring layers used for forming the reinforcing structure under the bonding area. As a result, the wiring layers under the probing area are efficiently utilized to forms wires for realizing the logical function of the integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.