Multilayer chip capacitor, circuit board apparatus having the capacitor, and circuit board
US7630208B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2008 |
| Grant date | Dec 8, 2009 |
| Priority date | — |
| Expiry date | Aug 26, 2028 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Provided is a multilayer chip capacitor including a capacitor body having first and second capacitor units arranged in a lamination direction; and a plurality of external electrodes formed outside the capacitor body. The first capacitor unit includes at least one pair of first and second internal electrodes disposed alternately in an inner part of the capacitor body, the second capacitor unit includes a plurality of third and fourth internal electrodes disposed alternately in an inner part of the capacitor body, and the first to fourth internal electrodes are coupled to the first to fourth external electrodes. The first capacitor unit has a lower equivalent series inductance (ESL) than the second capacitor unit, and the first capacitor unit has a higher equivalent series resistance (ESR) than the second capacitor unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.