Gate drive device for display device and display device having the same
US7633481B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 27, 2006 |
| Grant date | Dec 15, 2009 |
| Priority date | — |
| Expiry date | Nov 14, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0251
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate drive portion for a display device including multiple pixels having first and second sub-pixels includes a first shift register generating a first output signal in response to a first gate clock signal, a second shift register generating a second output signal in response to a second gate clock signal, a level shifter coupled to the first and second shift registers and amplifying the first and second output signals, and an output buffer coupled to the level shifter and generating first and second gate signals. The first gate signal is generated in synchronization with the first gate clock signal and the second gate signal is generated in synchronization with the second gate clock signal. Accordingly, the charging time of the first and second sub-pixels may be improved by separately driving the odd-numbered and even-numbered sub-pixels and the visibility of the LCD device may also be improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.