Patent · US Active

Wideband phase-locked loop with adaptive frequency response that tracks a reference

US7634038B1 · kind B1 · utility

3Cited by
2References
25Claims
0Family size

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Inventors

Key dates

Filing dateJan 24, 2006
Grant dateDec 15, 2009
Priority date
Expiry dateDec 21, 2027

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K9/06
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A self-tuning 3rd order type III phase-locked loop (PLL) is disclosed. In one aspect, the PLL provides frequency control that is implemented in three (3) parallel paths. The PLL provides frequency response tracking using a number of elements including a triple control voltage-controlled oscillator (VCO), a frequency-to-current (F2I) converter, and a switched capacitor loop filter. In addition to compensation for feedback ratio variation, near constant F2I gain over process variations and switched capacitor filters synchronized to a reference signal, near constant VCO gain over process variations allows the open loop frequency response to be tailored to track the reference signal. A high-speed locking technique is employed which significantly reduces acquisition time in low bandwidth cases. This PLL may be fabricated in a 0.18 μm CMOS logic process.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.