Majority-detected erasure enhanced error correction
US7634706B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 5, 2006 |
| Grant date | Dec 15, 2009 |
| Priority date | — |
| Expiry date | Jul 3, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B2020/1836
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A system for enhancing the error correction capability of an error correction code (“ECC”) during error recovery operations accumulates, for respective bits, counts of the number of times the bits are detected as 1s in multiple re-reads of a data signal. The system then determines, based on the associated count, if a reconstructed bit should be considered a 1 or 0, or neither, that is, if the reconstructed bit should be considered erroneous, by comparing the count to a majority detection threshold and then to either an upper or a lower predetermined threshold that corresponds to the confidence with which the bit is reconstructed as a either a 1 or a 0. If the confidence is sufficiently low, that is, if the count falls below the upper threshold or above the lower threshold, the reconstructed bit is flagged as erroneous. After all of the bits are reconstructed, the system groups the bits into symbols to reproduce the ECC codeword, and sets erasure pointers that identify the locations of a predetermined number, s, of the symbols that are associated with the highest degree of uncertainty, that is, the largest numbers of flagged bits or, as appropriate, the largest numbers of flagged bi…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.