Semiconductor device
US7635891B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 28, 2007 |
| Grant date | Dec 22, 2009 |
| Priority date | — |
| Expiry date | Nov 28, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/685
Abstract
A semiconductor device includes a semiconductor substrate, and a memory cell array provided on the semiconductor substrate and including a plurality of memory cells arranged on the semiconductor substrate, each of the plurality of the memory cells including a first insulating film provided on the semiconductor substrate, a charge storage layer provided on the first insulating film, a second insulating film provided on the charge storage layer, and a control electrode containing metal or metal silicide provided on the charge storage layer via the second insulating film, wherein a corner of a lower part of the control electrode includes semiconductor and fails to contain the metal or the metal silicide in a channel width direction view of the memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.