Patent · US Active

Method and system for memory address translation and pinning

US7636800B2 · kind B2 · utility

30Cited by
10References
9Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 27, 2006
Grant dateDec 22, 2009
Priority date
Expiry dateDec 19, 2026

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/1044
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method and system for memory address translation and pinning are provided. The method includes attaching a memory address space identifier to a direct memory access (DMA) request, the DMA request is sent by a consumer and using a virtual address in a given address space. The method further includes looking up for the memory address space identifier to find a translation of the virtual address in the given address space used in the DMA request to a physical page frame. Provided that the physical page frame is found, pinning the physical page frame al song as the DMA request is in progress to prevent an unmapping operation of said virtual address in said given address space, and completing the DMA request, wherein the steps of attaching, looking up and pinning are centrally controlled by a host gateway.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.