Mask set for variable mask field exposure
US7638245B2 · kind B2 · utility
0Cited by
4References
5Claims
0Family size
Assignee
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Key dates
| Filing date | Jul 3, 2008 |
| Grant date | Dec 29, 2009 |
| Priority date | — |
| Expiry date | Jul 3, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/70466
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method of fabricating integrated circuits according to a first design. One first pattern is common with a second design, and one second pattern is unique to the first design. The first pattern is imaged using a first mask having first patterns formed in a block thereon. No other patterns of the first and second designs are formed on the first mask. The second patterns are imaged on the substrate using a second mask having second patterns formed in a block thereon. At least one third layer pattern is formed on the second mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.