Stacked packaging designs offering inherent anti-tamper protection
US7638866B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2005 |
| Grant date | Dec 29, 2009 |
| Priority date | — |
| Expiry date | Aug 21, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10674
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An electronic device includes a die, a first circuit substrate connected to the die, and a second circuit substrate closely coupled to the first circuit substrate. The die is located between the first and second circuit substrates and is protected from tampering by the close coupling of the first and second circuit substrates. The circuit substrates may be circuit carrying elements (e.g. circuit boards) or may be additional die, may be any number of other substrates, and/or may be a combination of substrates. The device may include a cavity such that the die is located in the cavity. The cavity could be formed by any number of means. The device may also include a second die connected to the second substrate such that the first die and second die are located in proximity to each other on opposite sides of the cavity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.