Fast settling reference voltage buffer with wide reference range
US7639059B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 12, 2007 |
| Grant date | Dec 29, 2009 |
| Priority date | — |
| Expiry date | Jun 30, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018585
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A reference voltage buffer circuit (20) includes first and second transistors (M1, M2) and first and second resistors (R1, R2) connected in series between positive and negative power supply voltages and providing a positive reference voltage (Vrp) and a negative reference voltage (Vrn) at the first current handling terminals of the first and second transistors, respectively. A first control voltage (Vg1) for driving the first transistor is generated by a first feedback loop and using a positive boosted voltage. A second control voltage (Vg2) for driving the second transistor is generated by a second feedback loop and using a negative boosted voltage. The first and second feedback loops establish the first and second control voltages while the positive and negative boosted voltages ensure sufficient drives are provided to the first and second transistors. The reference voltage buffer is capable of fast settling while maintaining a wide reference voltage range.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.