Multi-segment parallel wire capacitor
US7639474B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2008 |
| Grant date | Dec 29, 2009 |
| Priority date | — |
| Expiry date | Dec 16, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/716
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A multi-segment parallel wire capacitor includes substantially identical multiple capacitor segments fabricated on a semiconductor substrate. Each segment comprises at least first and second interleaved metal finger formed in a first metal layer above the substrate and third and fourth interleaved metal fingers formed in a second metal layer. The first and fourth sets are connected together to form one plate of the capacitor and the second and third sets are connected to form a second plate. The multiple capacitor segments are arranged in a matrix having M rows and N columns. The multiple capacitor segments are inter-connected in such a manner that the capacitor segments in each column of the matrix are connected in parallel. First and second metal lines selectively connect the plates of the different capacitor segments in the first and last rows and serve as the two opposite terminals of the multi-segment parallel wire capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.