Patent · US Active

Thermal shunt for active devices on silicon-on-insulator wafers

US7639719B2 · kind B2 · utility

19Cited by
1References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 31, 2007
Grant dateDec 29, 2009
Priority date
Expiry dateMar 27, 2028

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01S5/1032
  • WIPO fieldOptics
  • WIPO sectorInstruments

Abstract

An optimized structure for heat dissipation is provided that may include two types of thermal shunts. The first type of thermal shunt employed involves using p and n metal contact layers to conduct heat away from the active region and into the silicon substrate. The second type of thermal shunt involves etching and backfilling a portion of the silicon wafer with poly-silicon to conduct heat to the silicon substrate.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.