Data transfer apparatus by direct memory access controller
US7640374B2 · kind B2 · utility
4Cited by
4References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 4, 2005 |
| Grant date | Dec 29, 2009 |
| Priority date | — |
| Expiry date | Feb 10, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A DMA apparatus which reads data corresponding to a descriptor from memory, and a dividing unit in a descriptor management device divides one descriptor into a plurality of sub-descriptors. A plurality of DMA controllers produce a plurality of reading requests for reading data corresponding to the plurality of sub-descriptors from the memory. A memory controller reads the corresponding data from the memory according to the plurality of reading requests.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.