Plasma display
US7642994B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2005 |
| Grant date | Jan 5, 2010 |
| Priority date | — |
| Expiry date | Jul 31, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/028
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A plasma display panel employs a voltage circuit having an input and an output, the voltage circuit configured for supplying a negative voltage for an electrode. The plasma display panel also employs a power supply that has a positive terminal and a negative terminal, where the negative terminal is connected to the input of the voltage circuit. The power supply is otherwise configured relative to the voltage circuit such that the voltage difference between the output and the input of the voltage circuit is fixed as a function of the power supply. By fixing this voltage difference, parasitic capacitance is minimized, power consumption and calorific value are reduced, and the plasma display panel operates in a more stable manner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.